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authorEric <tilcboy44@gmail.com>2026-07-30 07:35:08 -0600
committerGitHub <noreply@github.com>2026-07-30 10:35:08 -0300
commit6ecd5f75650bc86e3b1ccbdf2999ec31c43f551b (patch)
treece11959c3b87811db7a18b89b31036d34b866544
parent68b11f46fc4d3035292b41ef1dee9ae957e0a0ef (diff)
sha: restrict the x86 bswap asm to x86 (#41)
ByteReverse(word32) in src/sha.h uses the x86 `bswap` instruction via inline asm, guarded only by `#if defined(__GNUC__)`. GCC and Clang define __GNUC__ on every architecture they target, so on aarch64 the guard passes and the assembler then rejects the instruction: Error: unknown mnemonic `bswap' -- `bswap %eax' This makes the tree fail to build on any ARM64 host -- Apple Silicon, ARM servers, a Raspberry Pi -- at a point far from anything the user did. Narrow the guard to the architectures where the instruction exists. The portable C fallback directly below is then used everywhere else; it was already there and already correct. Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
-rw-r--r--src/sha.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sha.h b/src/sha.h
index e3af7b4..ddf5cf1 100644
--- a/src/sha.h
+++ b/src/sha.h
@@ -72,7 +72,7 @@ inline word16 ByteReverse(word16 value)
72 72
73inline word32 ByteReverse(word32 value) 73inline word32 ByteReverse(word32 value)
74{ 74{
75#if defined(__GNUC__) 75#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
76 __asm__ ("bswap %0" : "=r" (value) : "0" (value)); 76 __asm__ ("bswap %0" : "=r" (value) : "0" (value));
77 return value; 77 return value;
78#elif defined(CRYPTOPP_BYTESWAP_AVAILABLE) 78#elif defined(CRYPTOPP_BYTESWAP_AVAILABLE)