diff options
Diffstat (limited to 'MINER_INTEGRATION_PLAN.md')
| -rw-r--r-- | MINER_INTEGRATION_PLAN.md | 29 |
1 files changed, 19 insertions, 10 deletions
diff --git a/MINER_INTEGRATION_PLAN.md b/MINER_INTEGRATION_PLAN.md index 646109b..00c4a0c 100644 --- a/MINER_INTEGRATION_PLAN.md +++ b/MINER_INTEGRATION_PLAN.md | |||
| @@ -122,16 +122,25 @@ with existing main/ code. The component is ready for consumption by external pro | |||
| 122 | - `main/main.cpp:307-313` — task creation (add tollgate tasks) | 122 | - `main/main.cpp:307-313` — task creation (add tollgate tasks) |
| 123 | - `components/connect/connect.c:162` — APSTA mode already supported | 123 | - `components/connect/connect.c:162` — APSTA mode already supported |
| 124 | 124 | ||
| 125 | ### Step 7: Implement NerdQAxePlus TollGate Integration — IN PROGRESS | 125 | ### Step 7: Implement NerdQAxePlus TollGate Integration — COMPLETE (commit `83e09ab9`) |
| 126 | 126 | ||
| 127 | - [ ] Create `main/tollgate_platform.cpp` — implements platform interface with NVS config + ASIC state | 127 | - [x] Create `main/tollgate_platform.cpp` — implements platform interface with NVS config + ASIC state |
| 128 | - [ ] Create `main/boards/tollgate_board.h/cpp` — TollGateBoard extends NerdAxe (AP+STA WiFi) | 128 | - [x] Create `main/tollgate_nerdqaxe.h` — init declarations for main.cpp/asic_result_task.cpp |
| 129 | - [ ] Patch `main/tasks/asic_result_task.cpp` — `#ifdef TOLLGATE` hook on share accepted | 129 | - [x] Patch `main/tasks/asic_result_task.cpp` — `#ifdef TOLLGATE` hook on share accepted |
| 130 | - [ ] Patch `main/main.cpp` — `#ifdef TOLLGATE` init block (AP, DNS, captive portal, stratum proxy) | 130 | - [x] Patch `main/main.cpp` — skip `wifi_softap_off()`, call `tollgate_nerdqaxe_init()` after mining starts |
| 131 | - [ ] Create `main/lwip_tollgate_hooks.h` — LWIP hook forwarding to tollgate_core | 131 | - [x] Update `main/CMakeLists.txt` — conditional TOLLGATE sources via `$ENV{TOLLGATE}` |
| 132 | - [ ] Update `main/CMakeLists.txt` — conditional TOLLGATE sources | 132 | - [x] Update top-level `CMakeLists.txt` — `-DTOLLGATE` compile definition when env var set |
| 133 | - [ ] Update top-level `CMakeLists.txt` — `-DTOLLGATE` compile definition when env var set | 133 | - [x] Add TollGate NVS keys to `main/nvs_config.h` |
| 134 | - [ ] Build: `BOARD=NERDAXE TOLLGATE=1 idf.py build` | 134 | - [x] Symlink `components/tollgate_core` from esp32-miner-integration worktree |
| 135 | - [x] Build: `BOARD=NERDAXE TOLLGATE=1 idf.py build` — PASS (2.9MB) | ||
| 136 | - [x] Stock build: `BOARD=NERDAXE idf.py build` — PASS (unaffected) | ||
| 137 | - [x] tollgate_core: extern "C" guards, stratum_proxy_init name fix, conditional NAPT | ||
| 138 | - [x] `ngit init` NerdQAxePlus as separate nostr repo (`esp-miner-nerdqaxeplus-tollgate`) | ||
| 139 | - [x] Push to `git.orangesync.tech` GRASP server | ||
| 140 | - [x] Cross-reference documentation (REMOTES.md in both repos) | ||
| 141 | |||
| 142 | Note: `main/boards/tollgate_board.h/cpp` and `main/lwip_tollgate_hooks.h` deferred — | ||
| 143 | using simpler `#ifdef TOLLGATE` patches directly in existing files instead. | ||
| 135 | 144 | ||
| 136 | ### Step 8: Hardware Testing on NerdAxe Ultra | 145 | ### Step 8: Hardware Testing on NerdAxe Ultra |
| 137 | 146 | ||